Re: [Starpu-devel] handles without sequential consistency, RW access mode and multiple memory nodes

[Samuel Thibault <samuel.thibault@ens-lyon.org>]

Hello,

Jean-Marie Couteyen, le Wed 30 Jul 2014 09:37:32 +0200, a écrit :
> What if a given handle (H) is accessed in RW by several tasks that have
> their dependencies fulfilled ?

The first one that gets its dependencies fulfilled will manage to
acquire the handle in RW mode.

> *First, I though that there was a safeguard that did not allow other tasks
> having H around its data to be ready when a task having H in W mode was
> ready or executing. So T1 or T2 can be scheduled or executed but not the two
> of them at the same time. Let's say it's T1.

Yes, that's it. It's roughly a first-come-first-served behavior (the
details of course are more complex since you have have other data which
makes the task wait, and we make tasks acquire handles in the same order
to avoid deadlocks.).

> *Then, I though that the MSI protocol was in charge to invalidate all the
> others copies (only M2 in our case) because of the W access, so that when T2
> is executed, a memory transfer take place and the data associated with H is
> up-to-date in M2 before T2 execution.
> 
> Is this right ?

That is right. Of course, a REDUX access mode is better to avoid such
ping-pong between memory nodes.

Samuel