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- From: Samuel Thibault <samuel.thibault@inria.fr>
- To: Hatem Ltaief <hatem.ltaief@kaust.edu.sa>
- Cc: "starpu-devel@lists.gforge.inria.fr" <starpu-devel@lists.gforge.inria.fr>, "Sameh M. Abdulah" <sameh.abdulah@kaust.edu.sa>, "Nicolas L. Doucet" <nicolas.doucet@kaust.edu.sa>
- Subject: Re: [Starpu-devel] Support for half precision
- Date: Fri, 19 Oct 2018 17:24:57 +0200
- List-archive: <http://lists.gforge.inria.fr/pipermail/starpu-devel/>
- List-id: "Developers list. For discussion of new features, code changes, etc." <starpu-devel.lists.gforge.inria.fr>
- Organization: I am not organized
Hatem Ltaief, le ven. 19 oct. 2018 15:20:24 +0000, a ecrit:
> We would like to use a tile matrix in single precision to host tiles in
> single precision as well as tiles in half precision. When about to operate
> on tiles containing half precision data, then only half of the data tile is
> meaningful, we would like starpu to transfer only the meaningful data from
> the tiles when needed, ie full data tile for single precision and half data
> tile for half precision.
> Basically, you are saying that we can allocate our overall matrix with tile
> data structure in single precision, and at the time of the starpu data
> registration done on a tile-basis, we should specify the proper element
> size.
> Is that correct?
Are the half-precision elements contiguous in memory?
Samuel
- [Starpu-devel] Processor grid and data distribution, Hatem Ltaief, 18/10/2018
- Re: [Starpu-devel] Processor grid and data distribution, Samuel Thibault, 18/10/2018
- Re: [Starpu-devel] Processor grid and data distribution, Hatem Ltaief, 19/10/2018
- [Starpu-devel] Support for half precision, Hatem Ltaief, 19/10/2018
- Re: [Starpu-devel] Support for half precision, Samuel Thibault, 19/10/2018
- Re: [Starpu-devel] Support for half precision, Hatem Ltaief, 19/10/2018
- Re: [Starpu-devel] Support for half precision, Samuel Thibault, 19/10/2018
- Re: [Starpu-devel] Support for half precision, Hatem Ltaief, 19/10/2018
- Re: [Starpu-devel] Support for half precision, Samuel Thibault, 19/10/2018
- Re: [Starpu-devel] Processor grid and data distribution, Samuel Thibault, 18/10/2018
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