Re: [Starpu-devel] Support for half precision

[Hatem Ltaief <hatem.ltaief@kaust.edu.sa>]

Hi Sam,
We have actually used half size of the 32bits tile from chameleon to stuff in 
whole 16bits tile. All kernels run on GPUs/tensor cores.
This is a hack In chameleon while waiting for a mature bfloat support for 
half precision on x86.
Thanks
Hatem

Sent from my iPhone

> On Jan 31, 2019, at 18:33, Samuel Thibault <samuel.thibault@inria.fr> wrote:
> 
> Hello,
> 
> Getting back to an old pending mail.
> 
> Samuel Thibault, le ven. 19 oct. 2018 17:24:57 +0200, a ecrit:
>> Hatem Ltaief, le ven. 19 oct. 2018 15:20:24 +0000, a ecrit:
>>> We would like to use a tile matrix in single precision to host tiles in 
>>> single precision as well as tiles in half precision. When about to 
>>> operate on tiles containing half precision data, then only half of the 
>>> data tile is meaningful, we would like starpu to transfer only the 
>>> meaningful data from the tiles when needed, ie full data tile for single 
>>> precision and half data tile for half precision.
>>> Basically, you are saying that we can allocate our overall matrix with 
>>> tile data structure in single precision, and at the time of the starpu 
>>> data registration done on a tile-basis, we should specify the proper 
>>> element size.
>>> Is that correct?
>> 
>> Are the half-precision elements contiguous in memory?
> 
> From what I see in the CUBLAS documentation for e.g. cublasHgemm, and SO
> like 
> https://stackoverflow.com/questions/43120062/cuda-cublas-and-half-precision-data-types
> https://stackoverflow.com/questions/32735292/can-anyone-provide-sample-code-demonstrating-the-use-of-16-bit-floating-point-in
> they are contiguous. So the overall matrix with tile data structure
> needs to be allocated in half precision, and registered to starpu with
> the half-precision element size. Probably Chameleon needs to be extended
> for that element size.
> 
> Now, when you want to mix both single precision and half-precision
> parameters for the same task, you'll need to implement the corresponding
> CUDA kernel.
> 
> Samuel